16- bit Processor Design

CAPC Processor is a 16 bit processor with main memory (RAM) of size 4,096 words, 16 bits per word. It was designed/built in LogicWorks4 for COMP212 Work (Computer Design and Architecture II) at Capilano College in the Spring2002 term. The CAPC Processor project (design/build the Processor) has been the major part of the work. This is the second version of the CAPC Processor Design Book.

• CAPC is a sequential processor with main memory (RAM) of size 4,096 words, 16 bits per word. 
• It is controlled/driven by a clock, generating Fetch (5 subcycles)/Execute cycle (3 subcycles) in 8 subcycles. 
• There's buses - 16 bit Information Bus for information & addresses (12 bits), & Control Bus. 
• Each word, when it is used as a machine instruction, contains a five bit OP code (bits 12,13,14, & 15) & an Operand, an address (bits 0 to 11) or a constant. 
• ALU unit has of input registers, U & V. It can computing ADD (U+V), AND(U^V), OR(U,V), NEG (-U) & SHR(U), shifting right 1 small bit of U. 
• There's 16 bit registers; instruction register IR, & general purpose register Greg. IR is the main register to decode & execute a machine instruction. 
• The 12 bit memory address register MAR is used to point the location by & massive memory. The 16 bit register MBR, memory buffer register, is used to interface with the datum into/from the main memory. 
• There's addressing modes: local addressing is generated by SP+Offset, where SP is the pointer register & offset is the 12 bit address given by bit 0 to 11 of IR register. An address is contained in the memory pointed by SP+Offset. In direct addressing mode, the direct is basically given by the 12 bit, bit 0 to 11, of an operand. 
• The pointer register SP could be used to simulate a Stack Pointer in programming CAPC. 
• There's 16 Machine Instructions (OP codes): 

OP code bit12..15	Instruction	Description
0000	HLT	Halt the clock signal. Operand (Bit0..11) is ignored.
0001	LOGC	Load Greg 12 bit Operand (from Bit0 to 11).
0010	LOSP	Load SP 12 bit operand (from Bit0 to 11).
0011	LOGM	Load Greg the 16 bit datum in the memory pointed by SP+Operand.
0100	SEGM	Copy the contents of Greg to the memory pointed by SP+Operand.